This patent application claims priority based on a Japanese patent applications, H11-052111 filed on Mar. 1 and 2000-19390 filed on Jan. 27, 2000, the contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor device. More particularly, the present invention relates to a semiconductor device used for testing a circuit installed within a circuit.
2. Description of the Related Art
In accordance with the conventional method, a test pattern signal is input through a probe needle of a prober by contacting the probe needle with a tested semiconductor in a pre-process test. This enables testing of whether or not a semiconductor such as a gate array or a system integrated circuit functions correctly, before the semiconductor is packaged.
However, it is difficult to test a semiconductor in advance, for a frequency range used in practice, since impedance of the probe needle is unequal to impedance of the tested semiconductor, and impedance of the probe needle is large. Thus, in the conventional pre-process test, the semiconductor is only tested using a lower frequency than those frequencies used in practice. Because of this, a semiconductor, which fails in the test with a frequency used in practice, has been processed in an up-coming process which thus causes reduction of yield rate in the latter process. Thus, the object of the present invention is to provide a semiconductor device capable of resolving the above-described problems. This object is achieved by combining characteristics recited in independent claims within the patent claims. In addition, dependent claims define further advantageous embodiments of the present invention.
It is preferable that a semiconductor device of the first preferred embodiment of the present invention include a measuring object circuit, a pattern generation circuit for generating a test pattern used for testing the operation of a measuring object circuit, and a data output terminal for outputting a test result generated by said measuring object circuit when a test pattern is given to the said measuring object circuit. Further, it is preferable that the semiconductor device includes a register for storing the test result when the test is performed. The data output terminal outputs the test result which is temporarily stored in the register. It is also preferable that the register includes plural flip-flops connected in series for storing the test result input from said measuring object circuit.
In addition, it is preferable that the semiconductor device includes a selector for selecting and outputting one of the test results stored in each of plural registers. In this case, the data output terminal outputs the test result selected by the selector to the exterior of the semiconductor device. Further, the semiconductor device may include an oscillator for generating and providing to the measuring object circuit a clock with a frequency used for the test, and a frequency control unit for controlling the frequency of oscillation of said oscillator. The frequency control unit may include an oscillation controller for outputting a signal to said oscillator, instructing the required frequency of oscillation. The oscillator may generate a clock with a maximum frequency under which the semiconductor device may operate normally. It is preferable that the oscillator includes an inverter for outputting a reversed input signal, a multiple stage delay device for delaying a signal output by said inverter, and a delay selector for selecting any output from said delay device for input to the inverter.
Furthermore, it is preferable that the semiconductor includes a trigger input terminal for inputting an activation signal to start the test, and a controller for controlling a test interval signal indicating an interval for the active period of test for a predetermined cycle. This control is achieved by synchronizing with said oscillator when the activation signal is received, whereby the pattern generation circuit generates the test pattern when the test interval signal is active. Still further, it is preferable that the semiconductor includes a delay circuit for delaying the clock for a predetermined time, and a register for storing the test result based on the clock delayed by said delay circuit. It is preferable that the semiconductor device further includes a ripple counter for dividing the clock delayed by said delayed circuit and a clock output terminal for outputting the divided clock. It is preferable that the ripple counter includes plural flip-flops connected in series for dividing an output signal output from the delay circuit. The delay circuit may include plural flip-flops connected in series for memorizing the test interval signal output from the controller.
In addition, it is preferable that the semiconductor device includes a counter for counting a clock number of a signal of the clock input after receiving a test start signal. Said controller inactivates the test interval signal when a count value of said counter reaches a predetermined value. It is preferable that the pattern generation circuit includes a memory for inputting a count value output from said counter and outputting a predetermined test pattern to said measuring object circuit corresponding to the count value. It is preferable that the controller includes a delay flip-flop for outputting the activation signal when the activation signal becomes active, and a flip-flop for initiating output of said test interval signal when the delay flip-flop outputs the activation signal and inactivating the test interval signal when the count value of the counter reaches a predetermined value.
It is preferable that the data output terminal has a data output terminal for outputting from the measuring object circuit the test result generated by the measuring object circuit, to the outside of the semiconductor device. The semiconductor device may include a clock input terminal for inputting a clock used in the test and supply to said measuring object circuit. The semiconductor device may include a clock selector for selecting one of clocks oscillated by said oscillator, in order to oscillate the clock used for the test, and supply to said measuring object circuit.
In addition, the semiconductor device may include a data input terminal for inputting the test pattern and supply to the measuring object circuit. This data input terminal is used in practice as the data input terminal for the measuring object circuit. It is preferable that the pattern generation circuit includes a data selector to select one test pattern from the test patterns output by a memory memorizing the test patterns and the test patterns input from the data terminal, for output to said measuring object circuit.
The summary of the invention described above does not list all characteristics necessary to the present invention. Sub-combinations of these characteristics may also include the present invention.